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1 changed files with 4 additions and 4 deletions
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@ -384,8 +384,8 @@ isel_matcher = PatternMatcher([
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x.ins(X86Ops.MOVm, src=fuse_address(x.src[0]) + (x.src[1],)) if (i:=to_imm(x.src[1])) is None else x.ins(X86Ops.MOVi, src=fuse_address(x.src[0]) + (i,))), # noqa: E501
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# **** X86Op -> X86Op ****
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# fuse loads into X86Ops that allow it, if beneficial
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(UPat(Ops.INS, src=(UPat(Ops.LOAD),), allow_any_len=True, name="x"), lambda ctx,x: fuse_load(ctx, x, 0) if x.arg in X86GroupOp.ReadMem1st else None),
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(UPat(Ops.INS, src=(UPat(), UPat(Ops.LOAD)), allow_any_len=True, name="x"), lambda ctx,x: fuse_load(ctx, x, 1) if x.arg in X86GroupOp.ReadMem2nd else None),
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(UPat(Ops.INS, src=(UPat(Ops.LOAD),), allow_any_len=True, name="x"), lambda ctx,x: fuse_load(ctx, x, 0) if x.arg in X86GroupOp.ReadMem1st else None), # noqa: E501
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(UPat(Ops.INS, src=(UPat(), UPat(Ops.LOAD)), allow_any_len=True, name="x"), lambda ctx,x: fuse_load(ctx, x, 1) if x.arg in X86GroupOp.ReadMem2nd else None), # noqa: E501
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(UPat(Ops.INS, src=(UPat(), UPat(), UPat(Ops.LOAD)), allow_any_len=True, name="x"), lambda ctx,x: fuse_load(ctx, x, 2) if x.arg in X86GroupOp.ReadMem3rd else None), # noqa: E501
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# allocate virtual register to X86Op with special constaints
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(UPat(Ops.INS, dtypes.ints+dtypes.floats+(dtypes.bool,), name="x"), lambda ctx,x:
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@ -426,8 +426,8 @@ post_regalloc_matcher = PatternMatcher([
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(UPat(Ops.INS, arg=X86Ops.DIV, name="x"), lambda x:
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(nx:=x.replace(src=x.src[:1]), [x.ins(X86Ops.MOVi, src=(imm(min(dtypes.uint32, x.dtype), 0),), tag=RDX), nx])),
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# rewrite two address instructions to two address form, if reused src wasn't coalesced insert a move
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(UPat(Ops.INS, name="x"), lambda ctx,x:
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(nx:=x.replace(src=x.src[1:]), [assign(ctx, x.src[0], x.tag), nx] if x.tag != x.src[0].tag else [nx]) if x.arg in X86GroupOp.TwoAddress1st else None),
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(UPat(Ops.INS, name="x"), lambda ctx,x: (nx:=x.replace(src=x.src[1:]),
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[assign(ctx, x.src[0], x.tag), nx] if x.tag != x.src[0].tag else [nx]) if x.arg in X86GroupOp.TwoAddress1st else None),
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])
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# ***** X86 spec *****
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