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113 lines
No EOL
5.7 KiB
Python
113 lines
No EOL
5.7 KiB
Python
import unittest
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from tinygrad.uop import Ops
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from tinygrad.uop.ops import UOp, dtypes, graph_rewrite
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from tinygrad.renderer.isa import X86Ops
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from tinygrad.renderer.isa.x86 import X86Renderer
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from tinygrad.renderer.isa.isa import IselContext, Register
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from tinygrad.helpers import SPEC
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@unittest.skipIf(SPEC > 1, "x86 spec not supported in full_spec")
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class TestIselX86(unittest.TestCase):
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def isel_rewrite(self, x:UOp): return graph_rewrite(x, X86Renderer().isel_matcher, IselContext(x), bottom_up=True)
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def test_cmove(self):
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a = UOp.variable("a", 0, 0, dtypes.int32)
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b = UOp.variable("b", 0, 0, dtypes.int32)
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c = (a < b).where(a, b)
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d = (a != b).where(a, b)
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f = c + d
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n = self.isel_rewrite(f)
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self.assertTrue(n.src[0].op is X86Ops.CMOVL and n.src[1].op is X86Ops.CMOVNE)
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# both comparisons become the same instruction
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self.assertTrue(n.src[0].src[2] == n.src[1].src[2] and n.src[0].src[2].op is X86Ops.CMP)
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def test_cmove_and_blend_with_float_cmp(self):
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a = UOp.variable("a", 0, 0, dtypes.float32)
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b = UOp.variable("b", 0, 0, dtypes.float32)
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c = a < b
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d = c.where(a.cast(dtypes.int32), b.cast(dtypes.int32))
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e = c.where(a, b)
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f = d + e
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n = self.isel_rewrite(f)
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# the comparison instruction depends on the user, int cmove uses flag while float cmove uses mask
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# so both flag producing and mask producing comparisons must be present
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self.assertTrue(n.src[0].op is X86Ops.CMOVB and n.src[0].src[2].op is X86Ops.VUCOMISS)
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self.assertTrue(n.src[1].op is X86Ops.VBLENDVPS and n.src[1].src[2].op is X86Ops.VCMPSS and n.src[1].src[2].src[2].arg == 1)
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# lower 2 32 bits must come from the same register and upper 2 32 bits must come from the same register
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def test_vshufps(self):
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a = UOp.variable("a", 0, 0, dtypes.float32.vec(4))
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b = UOp.variable("b", 0, 0, dtypes.float32.vec(4))
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c = UOp.variable("c", 0, 0, dtypes.float32)
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d = UOp.variable("d", 0, 0, dtypes.float32)
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# shuffle between 2 vectors
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, a.dtype, (a.gep(0), a.gep(1), b.gep(2), b.gep(3))))
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self.assertTrue(n.op is X86Ops.VSHUFPS)
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# shuffle between 2 scalars
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, a.dtype, (c, c, d, d)))
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self.assertTrue(n.op is X86Ops.VSHUFPS)
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# shuffle between vector and scalar
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, a.dtype, (a.gep(0), a.gep(1), c, c)))
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self.assertTrue(n.op is X86Ops.VSHUFPS)
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# shuffle between 1 vector
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, a.dtype, (a.gep(1), a.gep(2), a.gep(3), a.gep(0))))
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self.assertTrue(n.op is X86Ops.VSHUFPS and n.src[0] is n.src[1])
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# a shuffle between 1 scalar is just a broadcast and matches X86Ops.VBROADCASTSS to allow for load fusion
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# this is the fallback slow VECTORIZE, 1 vinsertps per src in VECTORIZE
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def test_vinsertps(self):
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a = UOp.variable("a", 0, 0, dtypes.float32.vec(4))
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b = UOp.variable("b", 0, 0, dtypes.float32.vec(4))
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c = UOp.variable("c", 0, 0, dtypes.float32.vec(4))
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d = UOp.variable("e", 0, 0, dtypes.float32)
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# pack 1 from vector and 1 from scalar, moving 0th element to position 0 does nothing so only 1 vinsertps is generated
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, dtypes.float32.vec(2), (a.gep(0), d)))
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self.assertTrue(n.op is X86Ops.VINSERTPS and n.src[0].op is X86Ops.DEFINE_REG)
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# interleaved shuffle between 2 vectors
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, a.dtype, (a.gep(0), b.gep(1), a.gep(2), b.gep(3))))
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self.assertTrue(n.op is X86Ops.VINSERTPS)
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# shuffle between 4 sources
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n = self.isel_rewrite(UOp(Ops.VECTORIZE, a.dtype, (a.gep(3), b.gep(2), c.gep(1), d)))
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self.assertTrue(n.op is X86Ops.VINSERTPS)
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# complex address is [base + index*scale + displacement]
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def test_complex_address(self):
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a = UOp.variable("a", 0, 0, dtypes.int32)
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load = UOp(Ops.PARAM, dtypes.int32.ptr(), arg=0).index(a + 1, ptr=True).load()
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n = self.isel_rewrite(load)
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# base is PARAM, index is "a"
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self.assertTrue(n.src[0].op is X86Ops.DEFINE_REG and n.src[1].op is X86Ops.DEFINE_REG)
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# displacement is the constant in "a" scaled to the buffer element size, dtype is int8 when the value fits otherwise int32
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self.assertTrue(n.src[2].op is X86Ops.IMM and n.src[2].dtype is dtypes.int8 and n.src[2].arg == 4)
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def test_fuse_load(self):
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load1 = UOp(Ops.PARAM, dtypes.int32.ptr(), arg=0).index(UOp.const(dtypes.int32, 0), ptr=True).load()
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load2 = UOp(Ops.PARAM, dtypes.int32.ptr(), arg=0).index(UOp.const(dtypes.int32, 1), ptr=True).load()
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n = self.isel_rewrite(load1 + load2)
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self.assertTrue(len(n.src) == 4)
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# don't fuse when used multiple times
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def test_dont_fuse_load_diff_users(self):
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load = UOp(Ops.PARAM, dtypes.int32.ptr(), arg=0).index(UOp.const(dtypes.int32, 0), ptr=True).load()
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add = load + 1
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n = self.isel_rewrite(add + load)
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self.assertTrue(len(n.src) == 2)
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def test_dont_fuse_load_same_user(self):
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load = UOp(Ops.PARAM, dtypes.int32.ptr(), arg=0).index(UOp.const(dtypes.int32, 0), ptr=True).load()
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n = self.isel_rewrite(load * load)
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self.assertTrue(len(n.src) == 2)
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# test noop has same reg as src, this is because noops aren't instructions but still need to be part of the graph
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# as they may have different dtype from src and the correct dtype is required to encode the correct instruction
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# by giving them the same reg as src we ensure they share the same live range
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@unittest.skip("hmmm")
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def test_noop(self):
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noop = UOp(Ops.NOOP, dtypes.int32, (UOp(Ops.PARAM, dtypes.int32.ptr(), arg=0),))
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n = self.isel_rewrite(noop)
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self.assertTrue(isinstance(n.arg, Register) and n.arg == n.src[0].arg)
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# TODO: might want to check that load isn't part of another range when fusing
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if __name__ == "__main__":
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unittest.main() |