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Author SHA1 Message Date
qazal
1202ff5787 clean up wave_size access 2026-03-19 20:17:33 +02:00
qazal
f53e4e72f1 Merge remote-tracking branch 'upstream/master' into cdna_emu_2 2026-03-17 17:45:16 +00:00
George Hotz
2605840ee2
 		flat llama (#15324) 
* FlatTransformer

* works

* pass in buffer views

* print stuff

* print

* bugfixes
 2026-03-17 19:39:55 +08:00
nimlgen
0a641ce17d
 		system: remote (#15318) 
* system: remote

* listen

* print

* fix

* minor
 2026-03-17 19:25:37 +08:00
Christopher Milan
69eefdca20
 		images with height=1 have less strict width rules (#15325) 2026-03-17 07:07:22 -04:00
chenyu
14eb8170e4
 		skip TestRunAsModule if libclang is loaded (#15323) 
reverse rule of TestAutogen skip, otherwise `NULL=1 python -m pytest test/null/test_autogen.py test/null/test_device.py` crashes for me
 2026-03-17 06:02:53 -04:00
qazal
e7c26b6319
 		viz: rename to Start Cycle for the sqtt graph (#15320) 2026-03-17 18:53:06 +09:00
nimlgen
e89a103984
 		remove dmaref (#15321) 
* remove dmaref

* imports
 2026-03-17 17:52:09 +08:00
chenyu
3090d4a6e0
 		disallow reshape from None shape [pr] (#15322) 
test_multigpu_clip_score works without it now
 2026-03-17 05:46:53 -04:00
nimlgen
a50fdb0528
 		nvcc macos (#15308) 
* fix nvcc install macos

* um

* arm

* per

* tm
 2026-03-17 17:25:33 +08:00
George Hotz
9d95321be3
 		set allow_implicit=False by default (#15319) 
* set allow_implicit=False by default

* modernize beautiful mnist
 2026-03-17 17:14:38 +08:00
nimlgen
e1c2d09720
 		system: rebar to remote devs (#15316) 2026-03-17 16:09:12 +08:00
chenyu
79d2e83853
 		tighter ALU/variable min==max -> CONST rule [pr] (#15317) 
only check Ops that can be simplified through this rule. halved the time for that rule in `PYTHONPATH=. TRACK_MATCH_STATS=2 python3 -O test/external/external_benchmark_schedule.py`
 2026-03-17 03:44:24 -04:00
George Hotz
584ec75aa2
 		precompile backward (#15311) 
* add precompile backward support

* cleanups

* fix

* compact grad

* split v not split

* simpler

* no NOOPT
 2026-03-17 15:28:40 +08:00
chenyu
6b6d1814ca
 		update no_vectorized_index [pr] (#15313) 
combine no_vectorized_index and no_vectorized_index_broadcast
 2026-03-17 03:05:23 -04:00
b1tg
856a839efc
 		llm: fix qwen3 moe topk renormalization (#15201) 2026-03-17 12:57:33 +08:00
chenyu
1283b57b4e
 		update fix_store_after_hazard (#15309) 
actual gate is just not CONTIGUOUS, also don't need to check against full backward_slice
 2026-03-16 23:55:59 -04:00
Christopher Milan
575b40b93a
 		determine image shapes before index devectorization (#15304) 2026-03-16 23:16:33 -04:00
George Hotz
3ff03be413
 		call always has tuple (#15297) 
* call always has tuple

* fix pre-commit and simplify

* update

* fix

* move that assert

* tuple

* fix multi

* cleanups

* fix merge
 2026-03-17 10:58:46 +08:00
chenyu
1b8b151195
 		simpler Tensor.assign (#15302) 2026-03-16 22:37:25 -04:00
wozeparrot
674c760974
 		embedded bwd vocab shard (#15001) 
* fix: remove more multi from call

* feat: embedding bwd vocab sharding

* clean: unused import

* clean: don't actually need this pattern
 2026-03-16 19:37:16 -07:00
Christopher Milan
62bfd48d95
 		smarter padding in image_conv2d (#15289) 2026-03-16 22:17:48 -04:00
chenyu
e1fab4d2a9
 		UOp.store is always void [pr] (#15301) 2026-03-16 21:58:05 -04:00
chenyu
02afb45f29
 		remove UOp.assign [pr] (#15300) 
* remove UOp.assign [pr]

it's all store and after, UOp is immutable

* fix test
 2026-03-16 21:45:41 -04:00
qazal
33bd33e783
 		sqtt: add CDNA ops enum, show in viz (#15140) 2026-03-17 09:38:42 +09:00
chenyu
3e2b7803e6
 		view assign replaces at buffer identity (#15298) 
matches what functions capture
 2026-03-16 19:58:38 -04:00
qazal
346596cdce
 		viz: nanoseconds time axis in sqtt (#15299) 
* ui

* secondaryTick is optional

* shader markers data

* instSt infra

* path forward

* details
 2026-03-17 07:20:18 +09:00
nimlgen
1bc4cb254c
 		signed tinygpu as default (#15296) 
* signed tinygpu as default

* f

* no sip
 2026-03-16 19:29:41 +08:00
Christopher Milan
0de519c7c2
 		[pr] fewer simplify calls in image_fixup (#15283) 2026-03-16 06:57:52 -04:00
nimlgen
27e29127b5
 		system: remote prereqs (#15290) 
* x

* new format for apl

* this

* typing

* rpc

* tuple

* linter+new tinygpu
 2026-03-16 18:45:41 +08:00
chenyu
837b06c609
 		style cleanups in allocations.py [pr] (#15295) 2026-03-16 05:45:24 -04:00
George Hotz
476276f4b4
 		support grads on tuples (#15287) 
* support grads on tuples

* simpler

* grad_fxn works

* cleanups

* unused
 2026-03-16 17:39:34 +08:00
chenyu
20799df10b
 		remove Ops.ASSIGN [pr] (#15294) 
goodbye
 2026-03-16 05:22:21 -04:00
chenyu
b3378e7022
 		UOp.assign is store+after [pr] (#15292) 2026-03-16 04:51:50 -04:00
George Hotz
2e1c81c23f
 		allow_implicit to disable implicit params (#15291) 
* allow_implicit to disable implicit params

* get both Tensor and UOp

* no implicits in llm
 2026-03-16 16:40:14 +08:00
chenyu
a0d1444790
 		Tensor.assign is store+after [pr] (#15288) 
* Tensor.assign is store+after [pr]

* put that back
 2026-03-16 04:04:55 -04:00
George Hotz
08662bc4ab
 		add TUPLE/GETTUPLE, simple tests pass (#15286) 
* simple tuple stuff passes

* resolved
 2026-03-16 15:06:02 +08:00
nimlgen
e7705fe311
 		system: pcidev doesn't care about bars (#15284) 2026-03-16 14:45:43 +08:00
nimlgen
ff0bcc8de0
 		system: iface p1 changes (#15278) 2026-03-16 10:48:25 +08:00
qazal
4445f50356
 		viz: variable duration rdna barriers (#15277) 
* viz: variable length rdna barriers

* work

* tiny changes

* simple wave simd test

* small wave sync test

* good multi barrier bug find

* simple fix

* wave_sync asserts

* rdna4 work

* more rdna4

* find more bugs in my model

* it's so much simpler

* wave_sync tests duration

* r4

* should just call this rdna4
 2026-03-16 06:06:19 +09:00
qazal
5cd1daa3bc
 		cdna asm_gemm in one file, remove old rdna3 asm (#15281) 2026-03-16 04:32:30 +09:00
chenyu
cd14e8e64b
 		allocations contiguous is store+after (#15280) 2026-03-15 11:58:40 -04:00
qazal
7b6211fdd7
 		sqtt: remove discover_ops script (#15279) 2026-03-15 22:17:06 +09:00
wozeparrot
473e5e4368
 		feat: make USE_ATOMICS embedding bwd faster (#15151) 2026-03-14 21:21:10 -07:00
qazal
3858bfc83d
 		sqtt: CDNA inst decodes (#15274) 
* sqtt: CDNA inst decodes

* JUMP packets other way

* cdna insts

* r3

* r4

* lds from simd1 and simd2
 2026-03-14 21:03:46 +09:00
Christopher Milan
d753c5d7e5
 		IMAGE=1 image_conv2d pads for bank conflicts (#15252) 2026-03-14 07:59:16 -04:00
Christopher Milan
9047249a7c
 		m.where(x.pad_to(m.shape), Invalid) ranges shrink (#15275) 2026-03-14 07:26:36 -04:00
nimlgen
f392c53c66
 		system: merge remote into pciiface (#15273) 
* system: merge remote into pciiface

* clenaer

* move

* mypy

* fix
 2026-03-14 18:44:20 +08:00
chenyu
13eec8fbe8
 		remove unused assign rules [pr] (#15268) 2026-03-14 05:37:49 -04:00
Christopher Milan
dabdc986df
 		shrink guarded ranges, try 2 (#15272) 2026-03-14 04:24:05 -04:00